Senior Staff Engineer Verification (m/f/div)

Senior Staff Engineer Verification

#WeAreIn for jobs that impact everyone's life.

What if your ideas could change the way the world connects, powers up, or thinks? As a Senior Staff Engineer Verification on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

Are you in?

Your role

Key responsibilities in your new role

• Execute end-to-end verification of IPs and their integration using best-in-class methodologies (e.g., formal verification, AI-assisted testing) to maximize quality while minimizing time and effort
• Review the third-party’s verification methodology and execution, from planning through implementation to final sign-off
• Drive vendor accountability to close gaps and meet milestone targets, ensuring integration readiness
• Actively guide and support the Chip Verification team in verifying the integrated IPs, with a focus on interoperability aspects
• Serve as a direct interface to the IP team to accelerate issue resolution
• Define automation frameworks and reusability strategies to accelerate the verification of derivative products
• Act as a cross-site and cross-team bridge, connecting various engineering disciplines and sites to minimize verification efforts and late findings
• Proactively drive the availability and quality of design infeeds through reviews and early engagement

Your profile

Qualifications and skills to help you succeed

• Bachelor’s or master’s degree in electrical engineering, Computer Engineering, Computer Science, or a related technical field
• 5+ years in ASIC, SoC, or FPGA functional verification with ownership of complex block, subsystem, or chip-level deliverables
• Expert proficiency in SystemVerilog, UVM, object-oriented testbench architecture, constrained-random verification, functional coverage, and assertion-based verification
• Ability to translate specifications and microarchitecture into verification plans, environments, tests, checkers, coverage models, and sign-off evidence
• Excellent knowledge of English, both written and spoken; German is a plus

Preferred

• Experience in power-aware verification using UPF
• Experience applying formal verification methodologies and portable stimulus for test development
• Strong debugging skills with a major simulation and debug toolchain and proficiency in Linux development and scripting or programming with Python, Tcl, Bash, C, or C++ for automation
• Experience in practical use of AI and development of AI agents
• Deep understanding of chip architecture, specifically regarding CPUs, port multiplexing, power management, bus systems and access protection schemes
• Proactive participation in concept and design reviews to ensure quality and verifiability, along with a demonstrated commitment to self-improvement and continuous learning
• Experience with RTL design and digital architecture with practical knowledge of sign-off readiness
• Experience with continuous integration flows

#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in?