Principal Engineer System Compute (f/m/div)

Vor 30+ Tagen
Langen (Frankfurt am Main) (Germany)
Vollzeit
Geschätztes Gehalt

Das könntest du laut kununu User:innen als Computertechniker:in in Deutschland verdienen

Ø 51.700 €
Bruttodurchschnittsgehalt Vollzeit
33.000 €83.900 €
Was die Firma über den Job sagt

#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As a Principal Engineer System Compute on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?

Your Role Key responsibilities in your new role

As a Principal Engineer System Compute, you will own the architectural definition of compute subsystems for future automotive MCUs and MPUs. You will drive hardware architecture and microarchitecture decisions across processors, accelerators, memory hierarchies, and interconnect fabrics, and provide technical leadership throughout the SoC development lifecycle.

  • Define and own hardware compute subsystem architectures for automotive MCUs and MPUs, including CPU, DSP, vector-processing, NPU, AI, and other accelerator subsystems
  • Translate system and product requirements into architecture specification and measurable power, performance, area (PPA), latency, bandwidth, safety, and real-time determinism targets
  • Drive architectural and microarchitectural trade-off decisions, including pipeline organization, parallelism, dataflow, hardware acceleration, resource sharing, and hardware/software partitioning
  • Architect memory hierarchies, caches, scratchpad memories, DMA engines, coherency mechanisms, network-on-chip and interconnect fabrics, and quality-of-service concepts
  • Lead performance modeling, architecture exploration, workload characterization, and bottleneck analysis for representative automotive workloads, including control, audio, vision, and edge inference
  • Work closely with RTL design, design verification, emulation, physical implementation, functional safety, security, and system teams to guide the implementation and validation of architectural concepts
  • Collaborate with compiler, firmware, runtime, and software teams to ensure efficient use of hardware capabilities and effective hardware/software partitioning
  • Lead architecture and design reviews, contribute to compute and IP roadmaps, mentor engineers, and represent the architecture in technical discussions with customers and partners

Your Profile Qualifications and skills to help you succeed

We are specifically seeking candidates whose primary background is in hardware architecture, microarchitecture, or SoC design. Profiles focused mainly on enterprise software architecture, application software development, or embedded software development without substantial ownership of hardware architecture are not the target for this position.

  • A master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field; an advanced degree is preferred for this level
  • At least six years of relevant experience in hardware architecture or microarchitecture for CPUs, DSPs, NPUs, accelerators, embedded processors, or complex SoCs, together with demonstrated technical leadership
  • Proven ownership of hardware architecture or microarchitecture definitions that progressed into RTL implementation and silicon products
  • Deep understanding of digital hardware architecture and design, including processor pipelines, parallel compute, multicore scaling, SIMD/vector processing, accelerator integration, and hardware data paths
  • Strong expertise in memory systems and interconnects, including caches, scratchpads, DMA, coherency, memory consistency, NoCs, bandwidth and latency analysis, and QoS
  • Experience collaborating with RTL design, verification, emulation, and physical implementation teams, with awareness of synthesis, timing, power, and area constraints
  • Hands-on experience with architecture exploration and performance modeling using analytical models, spreadsheets, Python, C/C++, performance simulators, emulators, or trace-analysis tools; ability to define new methodologies when needed
  • Familiarity with real-time determinism and automotive safety and security requirements, including isolation, ECC, fault handling, and functional safety concepts
  • Ability to write precise architecture specifications, structure complex trade-off decisions, align stakeholders, and mentor senior engineers
  • Fluent English; German language skills are an advantage

Contact:

Carolina Moreira

#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in?

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